A verifier for network decompositions of command-based specifications
Jo Ebergen, S. Gingras · 2002
An automatic verifier for speed-independent circuits is discussed. All specifications of components are given in a CSP-like notation called commands. Specifications are implemented by networks of components. Implementations can be verified against four correctness criteria: two structural conditions for the network, one safety condition, and a progress condition. The main advantages of the verifier include the use of commands as a specification language, the verification of a progress condition, and the possible avoidance of state explosion by means of two structured verification methods: stepwise verification and partwise verification. The verifier is illustrated by means of some examples.>