A design technique for two-dimensional multiplierless FIR filters for video applications
L. Banzato, Nevio Benvenuto, G.M. Cortelazzo · IEEE Transactions on Circuits and Systems for Video Technology · 1992
To eliminate multipliers in the hardware implementation, filters with the coefficients that are given by the sum or difference of two power-of-two terms are designed. For a minimax criterion, a global optimization procedure known as simulated annealing has been used to determine the coefficients. Significant improvement in the filter performance is gained over methods that simply round the infinite precision solution. The algorithm also allows the maximum value of the coefficient wordlength beyond which filter performance does not improve to be found. A number of design examples involving typical video specifications, such as deinterlacing filters and luminance/chrominance separation filters, are reported. The method proves to be very effective, yet the designs are within the dimensional limits of the filters used in current industrial applications.>