Embedded deterministic test for low cost manufacturing test
Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, R. Thompson, Kun-Han Hans Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Egil Eide, Jun Qian · 2003
This paper introduces embedded deterministic test (EDT) technology, which reduces manufacturing test cost by providing one to two orders of magnitude reduction in scan test data volume and scan test time. The EDT architecture, the compression algorithm, design flow, experimental results, and silicon implementation are presented.