Address Translation for Throughput-Oriented Accelerators
Bharath Pichai, Lisa R. Hsu, Abhishek Bhattacharjee · IEEE Micro · 2015
With processor vendors embracing hardware heterogeneity, providing low overhead hardware and software abstractions to support easy-to-use programming models is a critical problem. In this context, this work sets the foundation for designing memory management units (MMUs) for GPUs in CPU/GPU systems, the key mechanism necessary to support the increasingly important unified address space paradigm in heterogeneous systems.