An integrated design approach for self-checking FPGAs
Cristiana Bolchini, Fabio Salice, Donatella Sciuto, R. Zavaglia · 2004
This paper proposes a methodology for designing FPGAs able to self-detect the occurrence of hardware failures, integrated in a standard, industrial design flow. The approach improves the results proposed in the past, by defining a testing environment which takes into account the peculiarities of FPGA platforms.