Design of a hybrid digital-analog neural co-processor for signal processing
Alexandre Ricardo Soares Romariz, P.U.A. Ferreira, J.V. Campelo, M.L. Graciano, J.C. da Costa · 2002
A hybrid architecture for neural coprocessing is presented. A fixed set of analog multipliers and capacitors (analog memory) emulates multilayer perceptrons through digitally-controlled multiplexing. Thus parallelism is partially preserved without direct analog implementation of the whole structure. Details of system VLSI implementation are given, along with simulation results and performance estimation.