SRAM embedded memory with low cost, flash EEPROM-switch-controlled redundancy

R.J. McPartland, D.J. Loeper, Frank P. Higgins, Ritu Singh, G.A. MacDonald, G. Komoriya, S. Aymeloglu, Michael V. DePaolis, Chi Wah Leung · 2002

This paper describes the use of low cost, flash EEPROM switches to control redundancy in SRAM embedded memories. Flash cell design, operation and process technology are described. A 768K-bit embedded SRAM memory with flash controlled column redundancy and built in self-repair is presented.

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