High throughput CORDIC-based systolic array design for the discrete cosine transform
Jue-Hsuan Hsiao, Liang-Gee Ghen, Tzi‐Dar Chiueh, Chun-Te Chen · IEEE Transactions on Circuits and Systems for Video Technology · 1995
We propose a modified fast algorithm for discrete cosine transform (DCT) by transferring the results from the discrete Hartley transform (DHT) to one additional CORDIC (coordinate rotation digital computer) computing stage. A fast CORDIC-based systolic array is designed with four derived attractive features, including: (1) the single/double data folding feature; (2) the constructive feature; (3) the to-computing feature; and (4) the redundant computation. Due to its properties, the proposed design has an efficient hardware utilization and a high throughput rate. By using the redundant path, this design also has the capability of error detection.>