Evaluation of a Refinement-Driven SystemC"-Based Design Flow
Thorsten Schubert, J. Hanisch, Joachim Gerlach, Jens-E. Appell, Wolfgang H. Nebel · Design, Automation, and Test in Europe · 2004
This paper describes the experiences and results that were made with a SystemC-based design flow for the implementation of an automotive digital hardware design. We present the refinement process starting from an initial high-level executable specification in C++ via SystemC down to a Gate-level description. we compare the synthesis results of the SystemC-based system-level design flow with those from a traditional VHDL-based register-transfer level design flow in terms of efficiency and simulation performance.