A parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems
Nobuo Funabiki, Yoshiyasu Takefuji · IEEE Transactions on Communications · 1994
The paper presents a parallel algorithm for time-slot assignment problems in TDM hierarchical switching systems, based on the neural network model. The TDM systems are operated in repetitive frames composed of several time-slots. A time-slot represents a switching configuration where one packet is transmitted through an I/O line. The goal of the algorithm is to find conflict-free time-slot assignments for given switching demands. The algorithm runs on a maximum of n/sup 2//spl times/m processors for m-time-slot problems in n/spl times/n TDM systems. In small problems up to a 24/spl times/24 TDM system, the algorithm can find the optimum solution in a nearly constant time, when it is performed on n/sup 2//spl times/m processors.>