Cache design for an Explicit Token Store data flow architecture
Ponnarasu Shanmugam, S. Andhare, Krishna M. Kavi, Behrooz Shirazi, Ali R. Hurson · 2002
This paper discusses the performance enhancement of an Explicit Token Store (ETS) architecture as a result of the introduction of hierarchical memory system. It indicates how locality can be exploited in a data-flow environment and evaluates a novel cache subsystem design for this purpose. The introduction of an operand cache and an instruction cache, cause a performance enhancement, remarkable enough, to justify their cost. The paper explores various optimizations and resource management schemes to enhance performance further and discusses the costs and trade-offs involved. Some of the ideas discussed in this paper for the ETS architecture are applicable to many fine-grained multithreaded architectures.>