Circularscan: a scan architecture for test cost reduction
Barış Arslan, Alex Orailoğlu · 2004
Scan-based designs are widely used to decrease the complexity of the test generation process; nonetheless, they increase test time and volume. A new scan architecture is proposed to reduce test time and volume while retaining the original scan input count. The proposed architecture allows the use of the captured response as a template for the next pattern with only the necessary bits of the cap-tured response being updated while observing the full captured re-sponse. The theoretical and experimental analysis promises a sub-stantial reduction in test cost for large circuits. 1.