A Remote Demonstrator for Dynamic FPGA Reconfiguration
Hugo Marques, JoCanas Ferreira, Inesc Tec · Portuguese National Funding Agency for Science, Research and Technology (RCAAP Project by FCT) · 2013
This paper presents a demonstrator for partial reconfiguration of FPGAs applied to image processing tasks. The main goal of the project is to develop an environment whichallows users to assess some of the advantages of using dynamic reconfiguration. The demonstration platform is built around a Xilinx Virtex-5 FPGA, which is used to implement a chain of four reconfigurable filters for processing images. Using a graphical interface, the user can choose which filter goes into which reconfigurable slot, submit images for processing and visualize the outcome of the whole process.