Combined 2-D Transform and Quantization Architectures for H.264 Video Coders
Heng-Yao Lin, Yi-Chih Chao, Che-Hong Chen, Bin-Da Liu, Jar‐Ferr Yang · 2005
In this paper, the low-complexity hardware architectures of 4/spl times/4 forward and inverse transforms with integrated quantizer and dequantizer for H.264 advanced video coders (AVC) are proposed. By applying the regularity of the quantization matrix, the quantization can be merged into the transform step, which results in a reduction of the hardware complexity in VLSI implementation. The proposed integrated transforms have been synthesized with TSMC 0.35 /spl mu/m technology. Simulation results show that it can achieve 256 M samples/sec at 32 MHz in the encoder part and 448 M samples/sec at 56 MHz in the decoder part.