An efficient memory arbitration algorithm for a single chip MPEG2 AV decoder
Teruhiro TAKIZAWA, M. Hirasawa · IEEE Transactions on Consumer Electronics · 2001
This paper presents an efficient memory arbitration algorithm for a system on a chip. We have implemented the algorithm into a single chip MPEG2 AV decoder. According to simulations, the memory access efficiency of the arbiter based on the new algorithm is around 95% with a 32-bit 133 MHz SDRAM, while those of conventional arbiters are less than 80%.