On memory allocation for high-speed packet analysis applications
Nicola Bonelli, Loris Gazzarrini, Stefano Giordano, Gregorio Procissi, Brian Trammell · 2013
The evolution of commodity hardware makes it a very attractive platform to develop high-performance networking applications that are affordable to deploy. All but the most trivial applications must copy packets into user-space for further analysis. Therefore, the allocation of memory for these copies becomes a performance-critical operation. In this work, we present a multi-layer slice memory allocator specifically designed to take advantage of spatial and temporal locality in dealing with high-speed packet processing applications. Experimental results show that the proposed approach clearly outperforms existing memory allocators in common networking use-cases.