Testable design for advanced serial-link transceivers
Mitchell Lin, Kwang-Ting Tim Cheng · 2007
This paper describes a DfT solution for modern serial-link transceivers. We first summarize the architectures of the Crosstalk Canceller and the Equalizer used in ad-vanced transceivers to which the proposed solution can be applied. The solution addresses the testability and ob-servability issues of the transceiver for both characteriza-tion and production testing. Without using sophisticated testing instrument setting, the proposed solution could test the clock and data recovery circuit and characterize the decision-feedback equalizer in the receiver. Our experi-ments demonstrate that the proposed method has signifi-cant higher fault coverage and lower hardware require-ment than the conventional approach of probing the eye-opening of the signals inside the transceiver.