An AS-DSP for forward error correction applications
Tien-Yuan Hsiao, Chien-Ching Lin, Hsie-Chia Chang · 2006
An application specific digital signal processor for channel coding is presented. The vector operations can improve both the performance of memory accesses and program code density. The special function units and datapaths for channel decoding accelerate the decoding speed and facilitate algorithm implementation. The processor had been fabricated in a 0.18 /spl mu/m CMOS 1P6M technology. The chip size is 7.73 mm/sup 2/ including 18k bits embedded memory, and the power consumption is 141 mW while decoding Reed-Solomon code and convolutional code. In contrast with general purpose processor designs, the results show this chip has at least 50% improvement in code density and 66% data rate enhancement.