Optimization of 16 bit fix-point multiplication in fast DCT implemented on TMS320C2000 DSP
J. Mohorko, Zarko Cucej · 2004
Multiplication in the implementation of JPEG algorithm on fix-point 16-bit digital signal processing does not only have an influence on the calculation time of compression performing but also on the quality of the decompressed images. Its implementation therefore, is usually balanced between accuracy and performing speed. One possible optimization when considering the TSM320C2000 digital signal processor family, is presented.