Montgomery Modular Multiplication Algorithm on Multi-Core Systems
Junfeng Fan, Kazuo Sakiyama, Ingrid M.R. Verbauwhede · SiPS ... design and implementation - IEEE Workshop on Signal Processing Systems · 2007
In this paper, we investigate the efficient software implementations of theMontgomery modular multiplication algorithm on amulti-core system. AHW/SW co-design technique is used to find the efficient system architecture and the instruction scheduling method. We first implement the Montgomery modular multiplication on a multi-core systemwith general purpose cores. We then speed up it by adopting the Multiply-Accumulate (MAC) operation in each core. As a result, the performance can be improved by a factor of 1.53 and 2.15 when 256-bit and 1024-bit Montgomery modular multiplication being performed, respectively.