A systolic VLSI architecture for multi-dimensional transforms
Thomas P. Kelliher, M.J. Irwin · IEEE International Conference on Acoustics Speech and Signal Processing · 1993
A VLSI architecture for separable kernel multidimensional transforms is described. What is novel about the architecture is its data rotator, which is a hexagonal mesh of processors. The rotator is completely scalable and modular and is programmable with respect to d and the length of each dimension. The proposed architecture has an AT/sup 2/ figure of O(d/sup 2/n/sup 2/ log/sup 2/ n), where d is the dimensionality, n is the total number of elements in the data cube, and the precision of an element is assumed to be Theta (log n). The value of AT/sup 2/ for the rotator itself is O(n/sup 2/ log/sup 2/ n) for a single rotation, which is optimal. Multidimensional separable kernel transforms may be computed by performing d sets of 1-D transforms, each along a unique axis of the d-D data cube. A natural architecture for such problems consists of a number of 1-D transform processors and a rotator or transposer.>