Timing analysis for synthesis in microprocessor interface design
M.A. Escalante, N.J. Dimopoulos · 1994
Design automation techniques are playing an important role in controlling the complexity of system design. Our work is inscribed in tlw &sign automation of microprocessor-based systems which necessitates the design of interjizces for system integration. During the interface synthesis if is required to validate the timing of a design yet to be iinplemented. In this paper we present a novel methodology to timing analysis that can determine tight bounds on interjlzce path delays based on the given timing information. The timing analysis for synthesis problem is formulated as a combinatorial optimization problem using interval arithmetic techniques. L