A hierarchical, design-for-testability (DFT) methodology for the rapid prototyping of application-specific signal processors (RASSP)
Richard M. Sedmak, J. Evans · 2002
This paper describes a highly automated hierarchical, design-for-testability process that spans the entire life cycle. Lockheed Martin's Advanced Technology Laboratories and Self-Test Services developed this process for the DoD's RASSP program, and it contributes significantly to the RASSP goals of 4/spl times/ improvement in cycle time, design quality, and life-cycle costs.