An approach to implement FIR filters for delta sigma inputs
N. Babaii, Abdolreza Nabavi · 2003
In this paper, a new structure to implement FIR delta sigma filters is presented. In this structure top data-coefficient multiplications are placed in multiple separate memory blocks then the outputs of the memory blocks are added together which results in the final output. By choosing the number of memory blocks, we can control the number of used gates, and the delay.