An SBNR floating-point convention
Octavio Morales · 2003
Three conflicting needs are identified in real-time scientific and military applications: high precision, to minimize rounding errors; wide dynamic range, to avoid overflow; and speed, to accommodate wideband signals. These three requirements are mutually exclusive in the sense that higher accuracy and wider range usually entail a decrease in throughput. To resolve the conflict, a floating-point signed-binary-number representation (SBNR) is described that exploits all of the characteristics of a redundant number system, while providing the wide dynamic range desired. When coupled with multiple-value logic (MVL), the proposed implementation is considered to offer potential for reducing on-chip interconnect area, and thus for minimizing chip pin-out, without exacerbating the already critical reliability issues.>