A practical approach to synchronous hardware verification
Ganesh K. Gopalakrishnan, Prabhat Jain · 1991
Hardware designs expressed in a simple hardware description language can be formally verified by adapting techniques developed for software verification. This paper presents a case study that supports this claim. From the structural specification of a two-phase clocked synchronous hardware design, a behavioral description is automatically inferred. This is subject to algebraic simplification using rewrite rules. Some of the simplification steps are achieved by discovering a loop invariant associated with a loop in the control flow graph. Once simplified, a homomorphism is exhibited from the implementation algebra to the specification algebra, to complete the proof.>