Design considerations for low-voltage on-board DC/DC modules for next generations of data processing circuits
M.T. Zhang, M.M. Jovanovic, F.C. Lee · IEEE Transactions on Power Electronics · 1996
By reducing the power supply voltage, a higher speed, lower power consumption, and higher integration density of data processing ICs can be achieved. Presently, a variety of ICs operating from 3.3 V are available. Next generations of ICs are expected to work even with lower voltages, i.e., in the 1-3 V range, to further enhance their speed-power performance. At the same time, during transients, these new generations of data ICs will present very dynamic loads with high current slew rates. As a result, they will require point-of-load power supplies in order to minimize the effects of the interconnection parasitics. These onboard power supplies will be derived from the existing voltages available in the system (usually 5 or 12 V), and will be required to have high power densities, high efficiencies, and good transient performance. This paper presents design considerations for these on-board power supplies and discusses their performance limits imposed by various circuit and system parasitics.