Redundancy management in arithmetic processing via redundant binary representations
Dhananjay S. Phatak, Thomas E. Goff, Israel Koren · 2003
It is well known that constant-time addition, in which the execution delay is independent of operand length, is feasible only if the output is expressed in a redundant representation. This paper presents a comprehensive analysis of constant-time addition and simultaneous format conversion where the source and destination digit sets are based on binary redundant numbers. We introduce the notion of "equal-weight grouping" (EWG) wherein, bits having the same weight are grouped together to achieve the constant-time addition and/or simultaneous format conversion operations. We also address some of the issues previously raised by Kornerup (see Proc. 14th IEEE Symposium on Computer Arithmetic, IEEE Computer Society, 1999, p. 152-6) which establishes necessary and sufficient conditions for constant-time addition or format conversion and indicate possible extensions of the theory developed therein.