Spatial correlation extraction via random field simulation and production chip performance regression
Bao Liu · 2008
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, for which foundry confidentiality policy has largely been blamed. A significant part of process variations are design specific, and can only be extracted from production chip performance statistics. In this paper, I adopt the homogeneous isotropic random field model for intra-die random variations, apply fast Fourier transform (FFT) to simulate a homogeneous isotropic random field, obtain corners for Monte Carlo SPICE simulation of timing critical paths in a VLSI circuit, and apply regression to match production chip performance statistics. Experimental results based on a timing critical path in an industry design with 65nm Predictive Technology Models reveal constant mean, increased standard deviation, and decreased skewness of a signal propagation path delay as spatial correlation increases. The proposed spatial correlation extraction technique can be applied in a chip tapeout process, where process variations extracted from an early tapeout help to improve statistical timing analysis accuracy and guide engineering change order of subsequent tapeouts.