Concurrent VLSI architectures for vector quantization
F. Ancona, Rodolfo Zunino · 2002
The paper describes a methodology to implement vector quantization based neural networks on concurrent VLSI architectures. A toroidal-mesh topology has been used to assess the overall approach. A theoretical analysis of the modular system's efficiency is presented. Experimental results on a significant testbed (low bit-rate image compression) shows a remarkable increase of the system's performances. In addition, the fit between predicted and measured efficiency values confirms the validity of the overall theoretical model.