Optimal reconfigurable HW/SW co-design of load flow and optimal power flow computation
M. Murach, Petya Vachranukunkiet, Prawat Nagvajara, Jeremy Russell Johnson, Chika O. Nwankpa · 2006
Load flow and optimal power flow (OPF) constitute core computations used in energy market operation. We considered different design partitions of computational tasks for a desktop computer equipped with field programmable gate array (FPGA). Load flow and OPF require lower-upper triangular matrix decomposition (LU). The number of clock cycles required for data transfer and floating-point operations were used as performance measures in determining optimal hardware/software partitions for each problem. Optimal partition performance is achieved by assigning the lower-upper triangular decomposition (LU) and matrix multiplication operations to custom hardware cores. A comparison between the proposed partition and software implemented using a state-of-the-art sparse matrix package running on a 3.2 GHz Pentium 4 shows a six-fold speedup