A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs
Stefano Di Carlo, P. Prinetto, Alberto Scionti, Joan Figueras, Salvador Manich, Rosa Rodriguez-Montanes · 2009
The continues improvement of manufacturing technologies allows the realization of integrated circuits containing an ever increasing number of transistors. A major part of these devices is devoted to realize SRAM blocks. Test and diagnosis of SRAM circuits are therefore an important challenge for improving quality of next generation integrated circuits. This paper proposes a flexible platform for testing and diagnosis of SRAM circuits. The architecture is based on the use of a low cost FPGA based board allowing high diagnosability while keeping costs at a very low level.