A PA-RISC microprocessor PA/50L for low-cost systems
Takashi Okada, S. Narita, Osamu Nishii, N. Hiratsuka, NOBUATSU HAYASHI, Masayuki ASAI, Shinichi Fujiwara, M. Satoh, J. Nishimoto, Hirokazu Aoki, Kota Uchiyama, Shinji Matsuo, H. Takewa, K. Yamada, Masahiro Kainaga, N. Nakagawa, M. Yamagami, Hideo Takeda, Toshihisa Funabashi · 2002
The PA/50L is a low-cost, low-power microprocessor from Hitachi Ltd. that is fully compatible with the PA-RISC architecture 1.1, third edition. This microprocessor achieves 55 VAX MIPS (Dhrystone 1.1), 10.6 MFLOPS (LINPACK inner loop) and 1.3 W at 33 MHz. In order to achieve high performance with no external cache, a non-blocking cache and a data prefetch instruction are provided. This paper gives an overview of the microprocessor and describes its capabilities.>