Patch-Based Occlusion Culling for Hardware Tessellation
Matthias Nießner, Charles Loop · 2012
We present an occlusion culling algorithm that leverages the unique characteristics of patch prim- itives within the hardware tessellation pipeline. That is, unseen patches are costly to compute, but easy to nd screen space bounds for. Our algorithm uses the well known hierarchical Z-buer approach, but we present a novel variant that uses temporal coherence to maintain lists of visible and occluded patches. Patches may be an- imated and have applied displacement maps. We also allow traditional triangle mesh geometry to serve as oc- cluders. This makes our scheme ideally suited for patch based articulated character models, moving within a polygonal environment.