Design, implementation and evaluation of a high-speed integrated Hamming neural classifier
D. Grant, John Taylor, P.K. Houselander · IEEE Journal of Solid-State Circuits · 1994
This paper describes a fixed-weight Hamming binary neural classifier chip suitable for applications where high-speed operation is required. The circuit uses switched current-mode techniques throughout and achieves classification in one forward pass through the network. The chip was realized in 2.4-/spl mu/m n-well CMOS technology and was designed to recognize the integers 0-9. It achieved a classification rate of 10 MHz without any observable tendency to misclassification or instability.>