Scheduling between basic blocks in the CADDY synthesis system
P. Gutberlet, Wolfgang Rosenstiel · 2003
In 'high level' IC synthesis, basic blocks are caused by the control schemes and the block structure of the specification language (branches, loops). These schemes must be considered by the construction of the controller. A method is presented to handle the basic blocks in a more flexible way which allows one to move operations between basic block boundaries. The goal is to improve the number of control steps of the circuit under fixed hardware resources.>