Realization of a DPCM coder for 13.5-MHz sampling rate in CMOS technology
Albrecht Rothermel · IEEE Journal of Solid-State Circuits · 1987
A DPCM (differential pulse-code modulation) coder integrated in a 2-/spl mu/m CMOS technology is discussed. The motivation was to introduce low-cost coders for video signals compatible with the planned European ISDN. Due to the internal feedback loop, the main problem was to achieve the required operating speed of 13.5 MHz sampling rate. Measurements of fabricated samples proved that the expected performance was achieved.