Tests for address decoder delay faults in RAMs due to inter-gate opens

A.J. van de Goor, Said Hamdioui, Zaid Al-Ars · 2004

This paper presents an electrical analysis of Address decoder Delay Faults 'AFDs' caused by resistive inter-gate opens in RAMs. It introduces a systematic method to explore the space of possible tests to detect these faults. The method is based on generating appropriate sensitizing address transitions and the corresponding sensitizing operation sequences.

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