A floating-point unit using stochastic arithmetic compliant with the IEEE-754 standard
Roselyne Chotin, Habib Mehrez · 2003
In this paper, we present CESTAC, a method to control round-off errors in floating-point scientific computation, based on stochastic arithmetic. The real time use of this method suffers from a bottleneck of software calculations. This paper gives a hardware alternative that would significantly accelerate the computation. The proposed hardware architecture has two parts: a standard floating-point unit (FPU) and a unit dedicated to the control of round-off errors.