Optimal design of megabyte second-level caches for minimizing bus traffic in shared-memory shared-bus multiprocessors
Yen‐Jen Oyang, Le-Chun Wu · 1992
As the design of shared-memory shared-bus multi-processors is heading toward employing megabyte second-level caches, how to optimize the design of the second-level caches in order to minimize the traffic on the shared bus and thus improve the system scalability is of great interest. The paper presents a comprehensive study on this issue through extensive trace-driven simulations and concludes with a few general and effective rules.>