High performance reconfigurable computing systems
Melissa C. Smith, Steven Drager, L. Pochet, Gregory D. Peterson · 2002
High performance reconfigurable computer systems exploit the parallel processing benefits of high performance computing in conjunction with the fast, adaptive hardware acceleration associated with reconfigurable computing. We introduce this novel approach to computer architecture by first discussing the current state of HPRC systems and promising HPRC system architectures, particularly with respect to their ability to exploit different types of potential parallelism at multiple levels. Next, we explore the most appropriate software architecture for HPRC systems, along with hardware architectural issues such as hardware virtualization. We then consider runtime issues concerning communications, context switching, and operating system services. Finally, we consider challenges with developing efficient applications on HPRC platforms.