Fault simulation of built-in tester for CMOS switched-current circuits

Jinsheng Wang, Wei‐Hsing Huang, Chin‐Long Wey · 2002

This paper presents a built-in tester that enhances the testability of CMOS switched-current circuits and simplifies their test generation process. The tester is comprised of a high accuracy current comparator, a voltage winder comparator, and a digital latch. In this study, a high accuracy current comparator which is capable of autozeroing and self-testing is developed. The autozeroing property increases the accuracy of the tester. This paper demonstrates the self-testability of the tester through a fault simulation.

Read the paper · More papers on PaperTik