At-speed verification technique for LRMs and PCBs
J.M. Nagy · 2002
A method is presented to perform at-speed verification and parametric evaluation of an LRM (line replaceable module) by testing the module to verify its form, fit, function, and interface (F31) characteristics. A demonstration of this methodology was conducted, utilizing a VLSI component tester as a display of this capability. The LRM demonstration was conducted on two distinct VLS test systems to verify the portability of using standard data formats and the concept of tester independence. The data format for capturing of the test requirements is the proposed IEEE standard TRSL (Test Requirement Specification Language) and the test vector information used the IEEE standard WAVES (Waveform and Vector Exchange Specification) format.>