A power-efficient polyphase sharpened CIC filter for sigma-delta ADCs
Nikhil Reddy Karnati, Kye‐Shin Lee, Joan E. Carletta, Robert J. Veillette · 2011
This paper presents a power-efficient poly-phase sharpened CIC filter for sigma-delta ADCs. In this scheme, by using a cascade of CIC filter and SCIC filter with proper optimization of the two-stage decimation structure, the power consumption can be considerably reduced compared to conventional SCIC filter architectures. Furthermore, poly-phase implementations for both the CIC and SCIC filter sections are used to further reduce the power. The proposed filter is designed with CMOS 1 μm technology, where the lowest power consumption is achieved among similar filter architectures.