Design of high-speed digital filters suitable for multi-DSP implementation
Kazunori Hayashi, K.K. Dhar, Kazunori Sugahara, K. Hirano · IEEE Transactions on Circuits and Systems · 1986
A multipath signal processing scheme is proposed to overcome the limitation on the throughput rate of present day available LSI devices which is specifically suitable for implementation using a number of Digital Signal Processors (DSP). Two methods are proposed to realize a given transfer functionH(z)of digital filter, with a throughput rate speed up factor ofN, over the conventional methods. The first method, called Delayed Multipath Approach here, uses anN-path structure as a building element. TheseNelements are connected successively with increasing delay units to realize a given transfer function. The second method preprocesses the input signal sequence by an FFT processor and follows it up byNof constituent transfer functions derived fromH(z)having real coefficients. The output of theseNconstituent transfer functions are finally postprocessed by inverse FFT processor to obtain the desired output signal. The number of the constituent transfer functions are double for a special case when the transfer function to be implemented has complex valued coefficients. These two methods serve as complementary approaches, because the first method is better suited for small values of the speed-up factorNand the second one has distinct advantage for larger values ofN. The discussion of the first design method is organized in two parts: FIR filter design and IIR filter design, for each of which 2-path andN-path structures are separately explained. The second design method is discussed under the headings of real transfer function and complex transfer function. Design examples are also given to illustrate both of these two methods. Finally, a multi-DSP hardware system is outlined which is specifically designed for implementing the multipath structures discussed here.