A transform coding chip set for image compression
I. Shah, Olu Akiwumi-Assani, B. Johnson · International Conference on Acoustics, Speech, and Signal Processing · 2002
Two application-specific integrated circuits (ASICs) were designed to perform hierarchical transformation (S-transform processor) and Lempel-Ziv entropy coding (data compressor/decompressor). The chips can be used independently or together as a transform coding chip set for image compression. The algorithms and chip architectures of the transform codec (S-transform processor) and the entropy codec (data compressor/decompressor) are described.>