A high performance vector quantisation chip
Mengyi Yan, Yi Hu, John V McCanny · 2002
A demonstrator chip is described for real time speech vector quantisation applications. The chip has been fabricated in a 1.2 micron CMOS technology and contains 38,000 transistors. It occupies a die area of only (4.8 /spl times/ 4.6) mm/sup 2 and can perform over 80 million multiply/accumulate operations per second. The chip fully demonstrates the benefits which result from using a regular dedicated VLSI architecture.>