An improved bit-flipping scheme to achieve run length control in coded systems
Zongwang Li, Jin Xie, B. V. K. Vijaya Kumar · IEEE Transactions on Magnetics · 2005
We propose an improved bit-flipping scheme that combines error-correcting codes such as low-density parity check codes with run length limit (RLL) constraints. In addition to its compatibility with soft decision decoding, the proposed scheme has the advantages of no error propagation and fixed block length. Testing with simulated data and real data show good performance. The loss in performance due to the introduction of RLL constraint is less than 0.1 dB at bit-error rate 10/sup -6/ and block-error rate 10/sup -4/.