A programmable analogue CMOS chip for high speed image processing based on cellular neural networks
Peter R. Kinget, Michiel S. J. Steyaert · 2002
This paper describes an analogue CMOS VLSI chip which implements a 4/spl times/4 continuous time cellular neural network (CNN) with programmable templates. With a new programmable current mirror circuit, the individual template values can be continuously set between 4 and 1/4 and the sign can be switched. Measurements are presented for the operation of the chip as a connected component detector, holefiller and shadow maker. It is demonstrated that this chip can be considered as an analogue programmable image processor. The programmable templates are to CNNs what instructions are to a microprocessor.>