An analog VLSI chip with asynchronous interface for auditory feature extraction
Nagendra Kumar, W. Himmelbauer, Gert Cauwenberghs, Andreas G. Andreou · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 1998
We present an analog VLSI chip intended to serve as a front end of a speech recognition system. The chip architecture is inspired by biological auditory models common to humans and primate vertebrates. We include experimental results on a 1.2-/spl mu/m CMOS custom analog VLSI implementation and speech recognition results obtained from software simulations of the hardware on the TI-DIGITS database.